Light emitting devices

ABSTRACT

Light-emitting devices; and related components, systems and methods are disclosed.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims priority under 35 U.S.C. §119 to the followingU.S. Provisional Patent Applications: 60/462,889, filed Apr. 15, 2003;60/474,199, filed May 29, 2003; 60/475,682, filed Jun. 4, 2003;60/503,653, filed Sep. 17, 2003; 60/503,654 filed Sep. 17, 2003;60/503,661, filed Sep. 17, 2003; 60/503,671, filed Sep. 17, 2003;60/503,672, filed Sep. 17, 2003; 60/513,807, filed Oct. 23, 2003; and60/514,764, filed Oct. 27, 2003. Each of these applications isincorporated herein by reference.

TECHNICAL FIELD

The invention relates to light-emitting devices, and related components,systems and methods.

BACKGROUND

A light emitting diode (LED) often can provide light in a more efficientmanner than an incandescent light source and/or a fluorescent lightsource. The relatively high power efficiency associated with LEDs hascreated an interest in using LEDs to displace conventional light sourcesin a variety of lighting applications. For example, in some instancesLEDs are being used as traffic lights and to illuminate cell phonekeypads and displays.

Typically, an LED is formed of multiple layers, with at least some ofthe layers being formed of different materials. In general, thematerials and thicknesses selected for the layers determine thewavelength(s) of light emitted by the LED. In addition, the chemicalcomposition of the layers can be selected to try to isolate injectedelectrical charge carriers into regions (commonly referred to as quantumwells) for relatively efficient conversion to optical power. Generally,the layers on one side of the junction where a quantum well is grown aredoped with donor atoms that result in high electron concentration (suchlayers are commonly referred to as n-type layers), and the layers on theopposite side are doped with acceptor atoms that result in a relativelyhigh hole concentration (such layers are commonly referred to as p-typelayers).

A common approach to preparing an LED is as follows. The layers ofmaterial are prepared in the form of a wafer. Typically, the layers areformed using an epitaxial deposition technique, such as metal-organicchemical vapor deposition (MOCVD), with the initially deposited layerbeing formed on a growth substrate. The layers are then exposed tovarious etching and metallization techniques to form contacts forelectrical current injection, and the wafer is subsequently sectionedinto individual LED chips. Usually, the LED chips are packaged.

During use, electrical energy is usually injected into an LED and thenconverted into electromagnetic radiation (light), some of which isextracted from the LED.

SUMMARY

The invention relates to light-emitting devices, and related components,systems and methods.

In one embodiment, the invention features a light-emitting device thatincludes a multi-layer stack of materials. The multi-layer stack ofmaterials includes a light-generating region and a first layer supportedby the light-generating region. The surface of the first layer isconfigured so that light generated by the light-generating region canemerge from the light-emitting device via the surface of the firstlayer. The surface of the first layer has a dielectric function thatvaries spatially according to a pattern, and the pattern has an ideallattice constant and a detuning parameter with a value greater thanzero.

In another embodiment, the invention features a light-emitting devicethat includes a multi-layer stack of materials. The multi-layer stack ofmaterials includes a light-generating region and a first layer supportedby the light-generating region. The surface of the first layer isconfigured so that light generated by the light-generating region canemerge from the light-emitting device via the surface of the firstlayer, and the surface has a dielectric function that varies spatiallyaccording to a nonperiodic pattern.

In a further embodiment, the invention features a light-emitting devicethat includes a multi-layer stack of materials. The multi-layer stack ofmaterials includes a light-generating region and a first layer supportedby the light-generating region. The surface of the first layer isconfigured so that light generated by the light-generating region canemerge from the light-emitting device via the surface of the firstlayer, and the surface has a dielectric function that varies spatiallyaccording to a complex periodic pattern.

In one embodiment, the invention features a light-emitting device thatincludes a multi-layer stack of materials. The multi-layer stack ofmaterials includes a layer of n-doped material, a layer of p-dopedmaterial, and a light-generating region. The light-emitting device alsoincludes a layer of reflective material that is capable of reflecting atleast about 50% of light generated by the light-generating region thatimpinges on the layer of reflective material. The surface of the layerof n-doped material is configured so that light generated by thelight-generating region can emerge from the light-emitting device viathe surface of the layer of n-doped material. The surface of the layerof n-doped material has a dielectric function that varies spatiallyaccording to a pattern, and the distance between the layer of p-dopedmaterial and the layer of reflective material is less than the distancebetween the layer of n-doped material and the layer of reflectivematerial.

In another embodiment, the invention features a light-emitting devicethat includes a multi-layer stack of materials including alight-generating region and a first layer supported by thelight-generating region. The surface of the first layer is configured sothat light generated by the light-generating region can emerge from thelight-emitting device via the surface of the first layer, and thesurface of the first layer has a dielectric function that variesspatially according to a pattern. The light-emitting device alsoincludes a layer of reflective material that is capable of reflecting atleast about 50% of light generated by the light-generating region thatimpinges on the layer of reflective material. The light-generatingregion is between the layer of reflective material and the first layer,and the pattern does not extend beyond the first layer.

In a further embodiment, the invention features a light-emitting devicethat includes a multi-layer stack of materials. The multi-layer stack ofmaterials includes a light-generating region, and a first layersupported by the light-generating region. The surface of the first layeris configured so that light generated by the light-generating region canemerge from the light-emitting device via the surface of the firstlayer. The light-emitting device also includes a material in contactwith the surface of the first layer, where the material has an index ofrefraction less than about 1.5. The light emitting device is packaged.

In one embodiment, the invention features a light-emitting device thatincludes a multi-layer stack of materials. The multi-layer stack ofmaterials includes a light-generating region and a first layer supportedby the light-generating region. The surface of the first layer isconfigured so that light generated by the light-generating region canemerge from the light-emitting device via the surface of the firstlayer. The surface of the first layer has a dielectric function thatvaries spatially according to a pattern. The light-emitting device alsoincludes a phosphor material supported by the surface of the firstlayer. The sidewalls of the light-emitting device are substantiallydevoid of the phosphor material.

In another embodiment, the invention features a method of making awafer. The method includes disposing a phosphor material on a surface ofthe wafer. The wafer includes a plurality of light-emitting devices.Each light-emitting device includes a multi-layer stack of materialsincluding a light-generating region and a first layer supported by thelight-generating region. The surface of the first layer is configured sothat light generated by the light-generating region can emerge from thelight-emitting device via the surface of the first layer, and thesurface of the first layer has a dielectric function that variesspatially according to a pattern.

In a further embodiment, the invention features a light-emitting devicethat includes a multi-layer stack of materials. The multi-layer stack ofmaterials includes a light-generating region and a first layer supportedby the light-generating region. The surface of the first layer isconfigured so that light generated by the light-generating region canemerge from the light-emitting device via the surface of the firstlayer, and the surface of the first layer has a dielectric function thatvaries spatially according to a pattern. The light-emitting device alsoincludes a phosphor material configured so that light generated by thelight-generating region that emerges via the surface of the first layerinteracts with the phosphor material so that light that emerges from thephosphor layer is substantially white light. The ratio of the height ofthe light-emitting device to an area of the light-emitting device issufficiently small enough for the white light to extend in alldirections.

In one embodiment, the invention features a light-emitting device thatincludes a multi-layer stack of materials. The multi-layer stack ofmaterials includes a light-generating region, and a first layersupported by the light-generating region. The surface of the first layeris configured so that light generated by the light-generating region canemerge from the light-emitting device via the surface of the firstlayer. The light-emitting device also includes a first sheet formed of amaterial that is substantially transparent to light that emerges fromthe light-emitting device, and a second sheet that includes a phosphormaterial. The second sheet is adjacent the first sheet. Thelight-emitting device is packaged, and the first and second sheets forma portion of the package for the light-emitting device.

In another embodiment, the invention features a light-emitting devicethat includes a multi-layer stack of materials including alight-generating region and a first layer supported by thelight-generating region. The surface of the first layer is configured sothat light generated by the light-generating region can emerge from thelight-emitting device via the surface of the first layer. The surface ofthe first layer has a dielectric function that varies spatiallyaccording to a pattern, and the pattern is configured so that lightgenerated by the light-generating region that emerges from thelight-emitting device via the surface of the first layer is morecollimated than a lambertian distribution of light.

In a further embodiment, the invention features a wafer that includes aplurality of light-emitting devices. At least some of the light-emittingdevices include a multi-layer stack of materials. The multi-layer stackof materials includes a light-generating region and a first layersupported by the light-generating region. The surface of the first layeris configured so that light generated by the light-generating region canemerge from the light-emitting device via the surface of the firstlayer. The surface of the first layer has a dielectric function thatvaries spatially according to a pattern, and the pattern is configuredso that light generated by the light-generating region that emerges fromthe light-emitting device via the surface of the first layer is morecollimated than a lambertian distribution of light. The wafer has atleast about five (e.g., at least about 25, at least about 50)light-emitting devices per square centimeter.

In one embodiment, the invention features a light-emitting device thatincludes a multi-layer stack of materials. The multi-layer stack ofmaterials includes a light-generating region and a first layer supportedby the light-generating region so that, during use of the light-emittingdevice, light generated by the light-generating region can emerge fromthe light-emitting device via a surface of the first layer. The surfaceof the first layer has a dielectric function that varies spatiallyaccording to a pattern, and at least about 45% (e.g., at least about50%, at least about 60%, at least about 70%) of.the total amount oflight generated by the light-generating region that emerges from thelight-emitting device emerges via the surface of the light-emittingdevice.

In another embodiment, the invention features a light-emitting devicethat includes a multi-layer stack of materials. The multi-layer stack ofmaterials includes a light-generating region and a first layer supportedby the light-generating region so that, during use of the light-emittingdevice, light generated by the light-generating region can emerge fromthe light-emitting device via a surface of the first layer. Thelight-emitting device has an edge which is at least about one millimeter(e.g., at least about 1.5 millimeters, at least about tow millimeters,at least about 2.5 millimeters) long, and the light-emitting device isdesigned so that the extraction efficiency of the light-emitting deviceis substantially independent of the length of the edge of the length ofthe edge.

In a further embodiment, the invention features a light-emitting devicethat includes a multi-layer stack of materials. The multi-layer stack ofmaterials includes a- light-generating region and a first layersupported by the light-generating region so that, during use of thelight-emitting device, light generated by the light-generating regioncan emerge from the light-emitting device via a surface of the firstlayer. The light-emitting device has an edge which is at least about onemillimeter (e.g., at least about 1.5 millimeters, at least about towmillimeters, at least about 2.5 millimeters) long, and thelight-emitting device is designed so that the quantum efficiency of thelight-emitting device is substantially independent of the length of theedge of the length of the edge.

In one embodiment, the invention features a light-emitting device thatincludes a multi-layer stack of materials. The multi-layer stack ofmaterials includes a light-generating region and a first layer supportedby the light-generating region so that, during use of the light-emittingdevice, light generated by the light-generating region can emerge fromthe light-emitting device via a surface of the first layer. Thelight-emitting device has an edge which is at least about one millimeter(e.g., at least about 1.5 millimeters, at least about tow millimeters,at least about 2.5 millimeters) long, and the light-emitting device isdesigned so that the wall plug efficiency of the light-emitting deviceis substantially independent of the length of the edge of the length ofthe edge.

In another embodiment, the invention features a method of making alight-emitting device. The method includes bonding a layer of areflective material with a layer of p-doped material. The light-emittingdevice includes a multi-layer stack of materials including the layer ofp-doped material, a light-generating region, and a first layer. Thefirst layer includes a surface having a dielectric function that variesspatially according to a pattern, and the reflective material is capableof reflecting at least about 50% of light generated by thelight-generating region that impinges on the layer of reflectivematerial.

In a further embodiment, the invention features a method of making alight-emitting device. The method includes disbanding a substrate bondedwith a first layer. The first layer forms a portion of a multi-layerstack of materials that includes a light-generating region, and themethod forms a light-emitting device in which a surface of the firstlayer has a surface with a dielectric function that varies spatiallyaccording to a pattern.

Embodiments can feature one or more of the following aspects.

The multi-layer stack of materials can be formed of a multi-layer stackof semiconductor materials. The first layer can be a layer of n-dopedsemiconductor material, and the multi-layer stack can further include alayer of p-doped semiconductor material. The light-generating region canbe between the layer of n-doped semiconductor material and the layer ofp-doped semiconductor material.

The light-emitting device can further include a support that supportsthe multi-layer stack of materials.

The light-emitting device can further include a layer of reflectivematerial that is capable of reflecting at least about 50% of lightgenerated by the light-generating region that impinges on the layer ofreflective material. The layer of reflective material can be between thesupport and the multi-layer stack of materials. The distance between thelayer of p-doped semiconductor material and the layer of reflectivematerial can be less than a distance between the layer of n-dopedsemiconductor material and the layer of reflective material. Thelight-emitting device can further include a p-ohmic contact layerbetween the layer of p-doped material and the layer of reflectivematerial.

The light-emitting device can further include a current-spreading layerbetween the first layer and the light-generating region.

The multi-layer stack of materials can be formed of semiconductormaterials, such as, for example, III-V semiconductor materials, organicsemiconductor materials and/or silicon.

In some embodiments, the pattern does not extend into thelight-generating region.

In certain embodiments, the pattern does not extend beyond the firstlayer.

In some embodiments, the pattern extends beyond the first layer.

The light-emitting device can further include electrical contactsconfigured to inject current into the light-emitting device. Theelectrical contacts can be configured to vertically inject electricalcurrent into the light-emitting device.

The pattern can be partially formed of a component selected from, forexample, holes in the surface of the first layer, pillars in the firstlayer, continuous veins in the first layer, discontinuous veins in thefirst layer and combinations thereof.

In some embodiments, the pattern can be selected from triangularpatterns, square patterns, and grating patterns.

In certain embodiments, the pattern can be selected from aperiodicpatterns, quasicrystalline patterns, Robinson patterns, and Ammanpatterns. In some embodiments, the pattern is a Penrose pattern.

In some embodiments, the pattern is selected from honeycomb patternsand. Archimidean patterns. In certain embodiments, a pattern (e.g., ahoneycomb pattern) can have holes with different diameters.

The pattern can be partially formed of holes in the surface of the firstlayer.

The detuning parameter can be, for example, at least about 1% of theideal lattice constant and/or at most about 25% of the ideal latticeconstant. In some embodiments, the pattern can correspond to asubstantially randomly detuned ideal pattern.

The pattern can be configured so that light emitted by the surface ofthe first layer has a spectrum of radiation modes, and the spectrum ofradiation modes is substantially the same as a characteristic emissionspectrum of the light-generating region.

The light-emitting device can be, for example, a light-emitting diode, alaser, or an optical amplifier. Examples of light-emitting devicesinclude organic light-emitting devices (OLEDs), flat surface-emittingLEDs, and high brightness light-emitting devices (HBLEDs).

In some embodiments, the surface of the first layer has features with asize of less than about λ/5, where λ is a wavelength of light that canbe emitted by the first layer.

In certain embodiments, the light-emitting device is packaged (e.g., inthe form of a packaged die). In some embodiments, a packagedlight-emitting device can be free of an encapsulant material.

In some embodiments, the material in contact with the surface of thefirst layer is a gas (e.g., air). The gas can have a pressure of lessthan about 100 Torr.

In certain embodiments, the material in contact with the surface of thefirst layer has an index of refraction of at least about one.

In some embodiments, a packaged LED includes a cover. The cover caninclude a phosphor material. The cover can be configured so that lightgenerated by the light-generating region that emerges via the surface ofthe first layer can interact with the phosphor material, and so thatlight that emerges via the surface of the first layer and interacts withthe phosphor material emerges from the cover as substantially whitelight.

In certain embodiments, the light-emitting device further includes afirst sheet comprising a material that is substantially transparent tolight that emerges from the light-emitting device, and a second sheetthat includes a phosphor material. The second sheet can be adjacent thefirst sheet, and a material having an index of refraction of less thanabout 1.5 can be between the first sheet and the surface of the firstlayer. The first and second sheets can be configured so that lightgenerated by the light-generating region that emerges via the surface ofthe first layer can interact with the phosphor material, and so thatlight that emerges via the surface of the first layer and interacts withthe phosphor material emerges from the second sheet as substantiallywhite light.

The phosphor material can be disposed on the surface of the first layer.

Methods of making a wafer can include disposing the phosphor material toform of a layer having a thickness that varies by less than about 20%.The methods can include flattening the layer of the phosphor material sothat a thickness of the layer of the phosphor material varies by lessthan about 20%. The methods can also include flattening the phosphormaterial after disposing the phosphor material on the surface of thefirst layer. The phosphor material can be, for example, spin-coated onthe surface of the wafer. The methods can include forming a plurality ofthe light emitting devices from the wafer, and separating at least someof the light-emitting devices from each other.

In some embodiments, when light generated by the light-generating regionemerges from the light-emitting device via the surface of the firstlayer, at least about 40% of the light emerging via the surface of thefirst layer emerges within at most about 30° of an angle normal to thesurface of the first layer.

In certain embodiments, the filling factor of the light-emitting deviceis at least about 10% and/or at most about 75%.

Methods of making a light-emitting device can further include , beforebonding the layer of the reflective material with the layer of p-dopedmaterial, bonding the first layer with a substrate, the multi-layerstack of materials being between the substrate and the layer ofreflective material. The methods can also include forming a bondinglayer between the first layer and the substrate. The methods can alsoinclude removing the substrate. The methods can further include lappingand polishing steps after removing the substrate. The substrate can beremoved after bonding the layer of the reflective material with thefirst layer. Removing the substrate can include heating a bonding layerdisposed between the first layer and the substrate. Heating the bondinglayer can decompose at least a portion of the bonding layer. Heating thebonding layer can include exposing the bonding layer to radiationemitted by a laser. Removing the substrate can include exposing thesubstrate using a laser liftoff process. Removing the substrate canresult in the surface of the first layer becoming substantially flat.The methods can further include, before forming the pattern in thesurface of the first layer, planarizing the surface of the first layerafter the first substrate is removed. Planarizing the surface of thefirst layer can include chemical-mechanical polishing the surface of thefirst layer. Planarizing the surface of the first layer can reduce theroughness of the surface of the first layer to greater than about λ/5,where λ is a wavelength of light that can be emitted by the first layer.Forming the pattern can include using nanolithography. The methods canalso include disposing a substrate on the layer of reflective material.The methods can further include disposing a current-spreading layerbetween the first layer and the light-generating region.

Embodiments can feature one or more of the following advantages.

In certain embodiments, an LED and/or a relatively large LED chip canexhibit relatively high light extraction.

In some embodiments, an LED and/or a relatively large LED chip canexhibit relatively high surface brightness, relatively high averagesurface brightness, relatively low need for heat dissipation orrelatively high rate of heat dissipation, relatively low etendue and/orrelatively high power efficiency.

In certain embodiments, an LED and/or a relatively large LED chip can bedesigned so that relatively little light emitted by the LED/LED chip isabsorbed by packaging.

In some embodiments, a packaged LED (e.g., a relatively large packagedLED) can be prepared without using an encapsulant material. This canresult in a packaged LED that avoids certain problems associated withthe use of certain encapsulant materials, such as reduced performanceand/or inconsistent performance as a function of time, thereby providinga packaged LED that can exhibit relatively good and/or reliableperformance over a relatively long period of time.

In certain embodiments, an LED (e.g., a packaged LED, which can be arelatively large packaged LED) can include a relatively uniform coatingof a phosphor material.

In some embodiments, an LED (e.g., a packaged LED, which can be arelatively large packaged LED) can be designed to provide a desiredlight output within a particular angular range (e.g., within aparticular angular range relative to the LED surface normal).

In some embodiments, an LED and/or a relatively large LED chip can beprepared by a process that is relatively inexpensive.

In certain embodiments, an LED and/or a relatively large LED chip can beprepared by a process that can be conducted on a commercial scalewithout incurring costs that render the process economically unfeasible.

Features and advantages of the invention are in the description,drawings and claims.

DESCRIPTION OF DRAWINGS

FIG. 1 is a side view of an LED with a patterned surface.

FIG. 2 is a top view the patterned surface of the LED of FIG. 1.

FIG. 3 is a graph of an extraction efficiency of an LED with a patternedsurface as function of a detuning parameter.

FIG. 4 is a schematic representation of the Fourier transformation of apatterned surface of an LED.

FIG. 5 is a graph of an extraction efficiency of an LED with a patternedsurface as function of nearest neighbor distance.

FIG. 6 is a graph of an extraction efficiency of an LED with a patternedsurface as function of a filling factor.

FIG. 7 is a top view a patterned surface of an LED.

FIG. 8 is a graph of an extraction efficiency of LEDs with differentsurface patterns.

FIG. 9 is a graph of an extraction efficiency of LEDs with differentsurface patterns.

FIG. 10 is a graph of an extraction efficiency of LEDs with differentsurface patterns.

FIG. 11 is a graph of an extraction efficiency of LEDs with differentsurface patterns.

FIG. 12 is a schematic representation of the Fourier transformation twoLEDs having different patterned surfaces compared with the radiationemission spectrum of the LEDs.

FIG. 13 is a graph of an extraction efficiency of LEDs having differentsurface patterns as a function of angle.

FIG. 14 is a side view of an LED with a patterned surface and a phosphorlayer on the patterned surface.

FIG. 15 is a side view of a epitaxial layer precursor to an LED with apatterned surface.

FIG. 16 is a side view of a epitaxial layer precursor to an LED with apatterned surface.

FIG. 17 is a side view of a epitaxial layer precursor to an LED with apatterned surface.

FIG. 18 is a side view of a epitaxial layer precursor to an LED with apatterned surface.

FIG. 19 is a side view of a epitaxial layer precursor to an LED with apatterned surface.

Like reference symbols in the various drawings indicate like elements.

DETAILED DESCRIPTION

FIG. 1 shows a side view of an LED 100 in the form of a packaged die.LED 100 includes a multi-layer stack 122 disposed on a submount 120.Multi-layer stack 122 includes a 320 nm thick silicon doped (n-doped)GaN layer 134 having a pattern of openings 150 in its upper surface 110.Multi-layer stack 122 also includes a bonding layer 124, a 100 nm thicksilver layer 126, a 40 nm thick magnesium doped (p-doped) GaN layer 128,a 120 nm thick light-generating region 130 formed of multiple InGaN/GaNquantum wells, and a AlGaN layer 132. An n-side contact pad 136 isdisposed on layer 134, and a p-side contact pad 138 is disposed on layer126. An encapsulant material (epoxy having an index of refraction of1.5) 144 is present between layer 134 and a cover slip 140 and supports142. Layer 144 does not extend into openings 150.

Light is generated by LED 100 as follows. P-side contact pad 138 is heldat a positive potential relative to n-side contact pad 136, which causeselectrical current to be injected into LED 100. As the electricalcurrent passes through light-generating region 130, electrons fromn-doped layer 134 combine in region 130 with holes from p-doped layer128, which causes region 130 to generate light. Light-generating region130 contains a multitude of point dipole radiation sources that emitlight (e.g., isotropically) within the region 130 with a spectrum ofwavelengths characteristic of the material from which light-generatingregion 130 is formed. For InGaN/GaN quantum wells, the spectrum ofwavelengths of light generated by region 130 can have a peak wavelengthof about 445 nanometers (nm) and a full width at half maximum (FWHM) ofabout 30 nm.

It is to be noted that the charge carriers in p-doped layer 126 haverelatively low mobility compared to the charge carriers in the n-dopedsemiconductor layer 134. As a result, placing silver layer 126 (which isconductive) along the surface of p-doped layer 128 can enhance theuniformity of charge injection from contact pad 138 into p-doped layer128 and light-generating region 130. This can also reduce the electricalresistance of device 100 and/or increase the injection efficiency ofdevice 100. Because of the relatively high charge carrier mobility ofthe n-doped layer 134, electrons can spread relatively quickly fromn-side contact pad 136 throughout layers 132 and 134, so that thecurrent density within the light-generating region 130 is substantiallyuniform across the region 130. It is also to be noted that silver layer126 has relatively high thermal conductivity, allowing layer 126 to actas a heat sink for LED 100 (to transfer heat vertically from themulti-layer stack 122 to submount 120).

At least some of the light that is generated by region 130 is directedtoward silver layer 126. This light can be reflected by layer 126 andemerge from LED 100 via surface 110, or can be reflected by layer 126and then absorbed within the semiconductor material in LED 100 toproduce an electron-hole pair that can combine in region 130, causingregion 130 to generate light. Similarly, at least some of the light thatis generated by region 130 is directed toward pad 136. The underside ofpad 136 is formed of a material (e.g., a Ti/Al/Ni/Au alloy) that canreflect at least some of the light generated by light-generating region130. Accordingly, the light that is directed to pad 136 can be reflectedby pad 136 and subsequently emerge from LED 100 via surface 110 (e.g.,by being reflected from silver layer 126), or the light that is directedto pad 136 can be reflected by pad 136 and then absorbed within thesemiconductor material in LED 100 to produce an electron-hole pair thatcan combine in region 130, causing region 130 to generate light (e.g.,with or without being reflected by silver layer 126).

As shown in FIGS. 1 and 2, surface 110 of LED 100 is not flat butconsists of a modified triangular pattern of openings 150. In general,various values can be selected for the depth of openings 150, thediameter of openings 150 and the spacing between nearest neighbors inopenings 150 can vary. Unless otherwise noted, for purposes of thefigures below showing the results of numerical calculations, openings150 have a depth 146 equal to about 280 nm, a non-zero diameter of about160 nm, a spacing between nearest neighbors or about 220 nm, and anindex of refraction equal to 1.0. The triangular pattern is detuned sothat the nearest neighbors in pattern 150 have a center-to-centerdistance with a value between (a−Δa) and (a+Δa), where “a” is thelattice constant for an ideal triangular pattern and “Δa” is a detuningparameter with dimensions of length and where the detuning can occur inrandom directions. To enhance light extraction from LED 100 (seediscussion below), detuning parameter, Δa, is generally at least aboutone percent (e.g., at least about two percent, at least about threepercent, at least about four percent, at least about five percent) ofideal lattice constant, a, and/or at most about 25% (e.g., at most about20%, at most about 15%, at most about 10%) of ideal lattice constant, a.In some embodiments, the nearest neighbor spacings vary substantiallyrandomly between (a−Δa) and (a+Δa), such that pattern 150 issubstantially randomly detuned.

For the modified triangular pattern of openings 150, it has been foundthat a non-zero detuning parameter enhances the extraction efficiency ofan LED 100. For LED 100 described above, as the detuning parameter Δaincreases from zero to about 0.15a, numerical modeling (described below)of the electromagnetic fields in the LED 100 has shown that theextraction efficiency of the device increases from about 0.60 to about0.70, as shown in FIG. 3.

The extraction efficiency data shown in FIG. 3 are calculated by using athree-dimensional finite-difference time-domain (FDTD) method toapproximate solutions to Maxwell's equations for the light within andoutside of LED 100. See, for example, K. S. Kunz and R. J. Luebbers, TheFinite-Difference Time-Domain Methods (CRC, Boca Raton, Fla., 1993); A.Taflove, Computational Electrodynamics: The Finite-DifferenceTime-Domain Method (Artech House, London, 1995), both of which arehereby incorporated by reference. To represent the optical behavior ofLED 100 with a particular pattern 150, input parameters in a FDTDcalculation include the center frequency and bandwidth of the lightemitted by the point dipole radiation sources in light-generating region130, the dimensions and dielectric properties of the layers withinmultilayer stack 122, and the diameters, depths, and nearest neighbordistances (NND) between openings in pattern 150.

In certain embodiments, extraction efficiency data for LED 100 arecalculated using an FDTD method as follows. The FDTD method is used tosolve the full-vector time-dependent Maxwell's equations:${{\overset{->}{\nabla}{\times \overset{->}{E}}} = {{- \mu}\frac{\partial\overset{->}{H}}{\partial t}}},{{\overset{->}{\nabla}{\times \overset{->}{H}}} = {{ɛ_{\infty}\frac{\partial\overset{->}{E}}{\partial t}} + \frac{\partial\overset{->}{P}}{\partial t}}},$where the polarizability {right arrow over (P)}={right arrow over(P)}₁+{right arrow over (P)}₂+ . . . +{right arrow over (P)}_(m)captures the frequency-dependent response of the quantum welllight-generating region 130, the p-contact layer 126 and other layerswithin LED 100. The individual {right arrow over (P)}_(m) terms areempirically derived values of different contributions to the overallpolarizability of a material (e.g., the polarization response for boundelectron oscillations, the polarization response for free electronoscillations). In particular,${{\frac{\mathbb{d}^{2}{\overset{->}{P}}_{m}}{\mathbb{d}t^{2}} + {\gamma_{m}\frac{\mathbb{d}{\overset{->}{P}}_{m}}{\mathbb{d}t}} + {\omega_{m}^{2}{\overset{->}{P}}_{m}}} = {{ɛ(\omega)}\overset{->}{E}}},$where the polarization corresponds to a dielectric constant${ɛ(\omega)} = {ɛ_{\infty} + {\sum\limits_{m}{\frac{s_{m}}{\omega_{m}^{2} - \omega^{2} - {{\mathbb{i}}\quad\gamma_{m}\omega}}.}}}$

For purposes of the numerical calculations, the only layers that areconsidered are encapsulant 144, silver layer 126 and layers betweenencapsulant 144 and silver layer 126. This approximation is based on theassumption that encapsulant 144 and layer 126 are thick enough so thatsurrounding layers do not influence the optical performance of LED 100.The relevant structures within LED 100 that are assumed to have afrequency dependent dielectric constant are silver layer 126 andlight-generating region 130. The other relevant layers within LED 100are assumed to not have frequency dependent dielectric constants. It isto be noted that in embodiments in which LED 100 includes additionalmetal layers between encapsulant 144 and silver layer 126, each of theadditional metal layers will have a corresponding frequency dependentdielectric constant. It is also to be noted that silver layer 126 (andany other metal layer in LED 100) has a frequency dependent term forboth bound electrons and free electrons, whereas light-generating region130 has a frequency dependent term for bound electrons but does not havea frequency dependent term for free electrons. In certain embodiments,other terms can be included when modeling the frequency dependence ofthe dielectric constant. Such terms may include, for example,electron-phonon interactions, atomic polarizations, ionic polarizationsand/or molecular polarizations.

The emission of light from the quantum well region of light-generatingregion 130 is modeled by incorporating a number of randomly-placed,constant-current dipole sources within the light-generating region 130,each emitting short Gaussian pulses of spectral width equal to that ofthe actual quantum well, each with random initial phase and start-time.

To cope with the pattern of openings 150 in surface 110 of the LED 100,a large supercell in the lateral direction is used, along with periodicboundary conditions. This can assist in simulating relatively large(e.g., greater than 0.01 mm on edge) device sizes. The full evolutionequations are solved in time, long after all dipole sources have emittedtheir energy, until no energy remains in the system. During thesimulation, the total energy emitted, the energy flux extracted throughtop surface 110, and the energy absorbed by the quantum wells and then-doped layer is monitored. Through Fourier transforms both in time andspace, frequency and angle resolved data of the extracted flux areobtained, and therefore an angle- and frequency-resolved extractionefficiency can be calculated. By matching the total energy emitted withthe experimentally known luminescence of light-generating region 130,absolute angle-resolved extraction in lumens/per solid angle/per chiparea for given electrical input is obtained.

Without wishing to be bound by theory, it is believed that the detunedpattern 150 can enhance the efficiency with which light generated inregion 130 emerges from LED 100 via surface 110 because openings 150create a dielectric function that varies spatially in layer 134according to pattern 150. It is believed that this alters the density ofradiation modes (i.e., light modes that emerge from surface 110) andguided modes (i.e., light modes that are confined within multi-layerstack 122) within LED 100, and that this alteration to the density ofradiation modes and guided modes within LED 100 results in some lightthat would otherwise be emitted into guided modes in the absence ofpattern 150 being scattered (e.g., Bragg scattered) into modes that canleak into radiation modes. In certain embodiments, it is believed thatpattern 150 (e.g., the pattern discussed above, or one of the patternsdiscussed below) can eliminate all of the guided modes within LED 100.

It is believed that the effect of detuning of the lattice can beunderstood by considering Bragg scattering off of a crystal having pointscattering sites. For a perfect lattice arranged in lattice planesseparated by a distance d, monochromatic light of wavelength λ isscattered through an angle θ according to the Bragg condition, nλ=2d sinθ, where n is an integer that gives the order of the scattering.However, it is believed that for a light source having a spectralbandwidth Δλ/λ and emitting into a solid angle ΔΘ, the Bragg conditioncan be relaxed by detuning the spacing of between lattice sites by adetuning parameter Δa. It is believed that detuning the latticeincreases the scattering effectiveness and angular acceptance of thepattern over the spectral bandwidth and spatial emission profile of thesource.

While a modified triangular pattern 150 having a non-zero detuningparameter Δa has been described that can enhance light extraction fromLED 100, other patterns can also be used to enhance light extractionfrom LED 100. When determining whether a given pattern enhances lightextraction from LED 100 and/or what pattern of openings may be used toenhance light extraction from LED 100, physical insight may first beused to approximate a basic pattern that can enhance light extractionbefore conducting such numerical calculations.

The extraction efficiency of LED 100 can be further understood (e.g., inthe weak scattering regime) by considering the Fourier transform of thedielectric function that varies spatially according to pattern 150. FIG.4 depicts the Fourier transform for an ideal triangular lattice.Extraction of light into a particular direction with in-plane wavevectork is related to the source emission S_(k′) into all those modes within-plane wavevector k′ (i.e. parallel to pattern 150) that arecompatible to k by the addition or subtraction of a reciprocal latticevector G, i.e k=k′±G. The extraction efficiency is proportional to themagnitude of the corresponding Fourier component (F_(k)) of thedielectric function ε_(G) given by${F_{\overset{->}{k}} = {c_{\overset{->}{k}}{\sum\limits_{\overset{->}{G}}{ɛ_{\overset{->}{G}}S_{\overset{->}{k} - \overset{->}{G}}}}}},{ɛ_{\overset{->}{G}} = {\int{{ɛ\left( \overset{->}{r} \right)}{\mathbb{e}}^{{- {\mathbb{i}}}\quad\overset{->}{G}\overset{->}{r}}{\mathbb{d}\overset{->}{r}}}}}$

Since light propagating in the material generally satisfies the equationk²(in-plane)+k²(normal)=ε(ω/c)², the maximum G to be considered is fixedby the frequency (ω) emitted by the light-generating region and thedielectric constant of the light-generating region. As shown in FIG. 4,this defines a ring in reciprocal space which is often called the lightline. The light line will be an annulus due to the finite bandwidth ofthe light-generating region but for sake of clarity we illustrate thelight line of a monochromatic source. Similarly, light propagatingwithin the encapsulant is bounded by a light line (the inner circle inFIG. 4). Therefore, the extraction efficiency is improved by increasingF_(k) for all directions k that lie within the encapsulant light-linewhich amounts to increasing the number of G points within theencapsulant light line and increasing the scattering strength ε_(G) forG points which lie within the material light line. This physical insightcan be used when selecting patterns that can improve extractionefficiency.

As an example, FIG. 5 shows the effect of increasing lattice constantfor an ideal triangular pattern. The data shown in FIG. 5 are calculatedusing the parameters given for LED 100 shown FIG. 1, except that theemitted light has a peak wavelength of 450 nm, and the depth of theholes, the diameter of the holes, and the thickness of the n-doped layer134 scale with the nearest neighbor distance, a, as 1.27 a, 0.72 a, and1.27 a+40 nm, respectively. Increasing the lattice constant, increasesthe density of G points within the light-line of the encapsulant. Aclear trend in extraction efficiency with NND is observed. It isbelieved that the maximum extraction efficiency occurs for NNDapproximately equal to the wavelength of light in vacuum. The reason amaximum is achieved, is that as the NND becomes much larger than thewavelength of light, the scattering effect is reduced because thematerial becomes more uniform.

As another example, FIG. 6 shows the effect of increasing hole size orfilling factor. The filling factor for a triangular pattern is given by(2π/{square root}3)*(r/a)², where r is the radius of a hole. The datashown in FIG. 6 are calculated using the parameters given for the LED100 shown in FIG. 1, except that the diameter of the openings is changedaccording the filling factor value given on the x-axis of the graph. Theextraction efficiency increases with filling factor as the scatteringstrengths (ε_(G)) increase. A maximum is observed for this particularsystem at a filling factor of ˜48%. In certain embodiments, LED 100 hasa filling factor of at least about 10% (e.g., at least about 15%, atleast about 20%) and/or at most about 90% (e.g., at most about 80%, atmost about 70%, at most about 60%).

While a modified triangular pattern has been described in which adetuning parameter relates to positioning of openings in the patternfrom the positions in an ideal triangular lattice, a modified (detuned)triangular pattern may also be achieved by modifying the holes in anideal triangular pattern while keeping the centers at the positions foran ideal triangular pattern. FIG. 7 shows an embodiment of such apattern. The enhancement in light extraction, the methodology forconducting the corresponding numerical calculation, and the physicalexplanation of the enhanced light extraction for a light-emitting devicehaving the pattern shown in FIG. 7 is generally the same as describedabove. In some embodiments, a modified (detuned) pattern can haveopenings that are displaced from the ideal locations and openings at theideal locations but with varying diameters.

In other embodiments, enhanced light extraction from a light-emittingdevice can be achieved by using different types of patterns, including,for example, complex periodic patterns and nonperiodic patterns. Asreferred to herein, a complex periodic pattern is a pattern that hasmore than one feature in each unit cell that repeats in a periodicfashion. Examples of complex periodic patterns include honeycombpatterns, honeycomb base patterns, (2×2) base patterns, ring patterns,and Archimidean patterns. As discussed below, in some embodiments, acomplex periodic pattern can have certain openings with one diameter andother openings with a smaller diameter. As referred to herein, anonperiodic pattern is a pattern that has no translational symmetry overa unit cell that has a length that is at least 50 times the peakwavelength of light generated by region 130. Examples of nonperiodicpatterns include aperiodic patterns, quasicrystalline patterns, Robinsonpatterns, and Amman patterns.

FIG. 8 shows numerical calculations for LED 100 for two differentcomplex-periodic patterns in which certain openings in the patterns havea particular diameter, and other openings in the patterns have smallerdiameters. The numerical calculations represented in FIG. 8 show thebehavior of the extraction efficiency (larger holes with a diameter of80 nm) as the diameter of the smaller holes (dR) is varied from zero nmto 95 nm. The data shown in FIG. 6 are calculated using the parametersgiven for the LED 100 shown in FIG. 1, except that the diameter of theopenings is changed according the filling factor value given on thex-axis of the graph. Without wishing to be bound by theory, multiplehole sizes allow scattering from multiple periodicities within thepattern, therefore increasing the angular acceptance and spectraleffectiveness of the pattern. The enhancement in light extraction, themethodology for conducting the corresponding numerical calculation, andthe physical explanation of the enhanced light extraction for alight-emitting device having the pattern shown in FIG. 8 is generallythe same as described above.

FIG. 9 shows numerical calculations for LED 100 having different ringpatterns (complex periodic patterns). The number of holes in the firstring surrounding the central hole is different (six, eight or 10) forthe different ring patterns. The data shown in FIG. 9 are calculatedusing the parameters given for the LED 100 shown in FIG. 1, except thatthe emitted light has a peak wavelength of 450 nm. The numericalcalculations represented in FIG. 9 show the extraction efficiency of LED100 as the number of ring patterns per unit cell that is repeated acrossa unit cell is varied from two to four. The enhancement in lightextraction, the methodology for conducting the corresponding numericalcalculation, and the physical explanation of the enhanced lightextraction for a light-emitting device having the pattern shown in FIG.9 is generally the same as described above.

FIG. 10 shows numerical calculations for LED 100 having an Archimideanpattern. The Archimedean pattern A7 consists of hexagonal unit cells 230of 7 equally-spaced holes with a nearest neighbor distance of a. Withina unit cell 230, six holes are arranged in the shape of a regularhexagon and the seventh hole is located at the center of the hexagon.The hexagonal unit cells 230 then fit together along their edges with acenter-to-center spacing between the unit cells of a′=a*(1+{squareroot}{square root over (3)}) to pattern the entire surface of the LED.This is known as an A7 tiling, because 7 holes make up the unit cell.Similarly, the Archimidean tiling A19 consists of 19 equally-spacedholes with a NND of a. The holes are arranged in the form of an innerhexagon of seven holes, and outer hexagon of 12 holes, and a centralhole within the inner hexagon. The hexagonal unit cells 230 then fittogether along their edges with a center-to-center spacing between theunit cells of a′=a*(3+{square root}{square root over (3)}) to patternthe entire surface of the LED. The enhancement in light extraction, themethodology for conducting the corresponding numerical calculation, andthe physical explanation of the enhanced light extraction for alight-emitting device having the pattern shown in FIG. 10 is generallythe same as described above. As shown in FIG. 10 the extractionefficiency for A7 and A19 is about 77%. The data shown in FIG. 10 arecalculated using the parameters given for the LED 100 shown in FIG. 1,except that the emitted light has a peak wavelength of 450 and exceptthat the NND is defined as the distance between openings within anindividual cell.

FIG. 11 shows numerical calculation data for LED 100 having aquasicrystalline pattern. Quasicrystalline patterns are described, forexample, in M. Senechal, Quasicrystals and Geometry (CambridgeUniversity Press, Cambridge, England 1996), which is hereby incorporatedby reference. The numerical calculations show the behavior of theextraction efficiency as the class of 8-fold based quasi-periodicstructure is varied. It is believed that quasicrystalline patternsexhibit high extraction efficiency due to high degree of in-planerotational symmetries allowed by such structures. The enhancement inlight extraction, the methodology for conducting the correspondingnumerical calculation, and the physical explanation of the enhancedlight extraction for a light-emitting device having the pattern shown inFIG. 11 is generally the same as described above. Results from FDTDcalculations shown in FIG. 11 indicate that the extraction efficiency ofquasicrystalline structures reaches about 82%. The data shown in FIG. 11are calculated using the parameters given for the LED 100 shown in FIG.1, except that the emitted light has a peak wavelength of 450 and exceptthat the NND is defined as the distance between openings within anindividual cell.

While certain examples of patterns have been described herein, it isbelieved that other patterns can also enhance the light extraction fromLED 100 if the patterns satisfy the basic principles discussed above.For example, it is believed that adding detuning to quasicrystalline orcomplex periodic structures can increase extraction efficiency.

In some embodiments, at least about 45% (e.g., at least about 50%, atleast about 55%, at least about 60%, at least about 70%, at least about80%, at least about 90%, at least about 95%) of the total amount oflight generated by light-generating region 130 that emerges from LED 100emerges via surface 110.

In certain embodiments, the cross-sectional area of LED 100 can berelatively large, while still exhibiting efficient light extraction fromLED 100. For example, one or more edges of LED 100 can be at least aboutone millimeter (e.g., at least about 1.5 millimeters, at least about twomillimeters, at least about 2.5 millimeters, at least about threemillimeters), and at least about 45% (e.g., at least about 50%, at leastabout 55%, at least about 60%, at least about 70%, at least about 80%,at least about 90%, at least about 95%) of the total amount of lightgenerated by light-generating region 130 that emerges from LED 100emerges via surface 110. This can allow for an LED to have a relativelylarge cross-section (e.g., at least about one millimeter by at leastabout one millimeter) while exhibiting good power conversion efficiency.

In some embodiments, the extraction efficiency of an LED having thedesign of LED 100 is substantially independent of the length of the edgeof the LED. For example, the difference between the extractionefficiency of an LED having the design of LED 100 and one or more edgeshaving a length of about 0.25 millimeter and the extraction efficiencyof LED having the design of LED 100 and one or more edges having alength of one millimeter can vary by less than about 10% (e.g., lessthan about 8%, less than about 5%, less than about 3%). As referred toherein, the extraction efficiency of an LED is the ratio of the lightemitted by the LED to the amount of light generated by the device (whichcan be measured in terms of energy or photons). This can allow for anLED to have a relatively large cross-section (e.g., at least about onemillimeter by at least about one millimeter) while exhibiting good powerconversion efficiency.

In certain embodiments, the quantum efficiency of an LED having thedesign of LED 100 is substantially independent of the length of the edgeof the LED. For example, the difference between the quantum efficiencyof an LED having the design of LED 100 and one or more edges having alength of about 0.25 millimeter and the quantum efficiency of LED havingthe design of LED 100 and one or more edges having a length of onemillimeter can vary by less than about 10% (e.g., less than about 8%,less than about 5%, less than about 3%). As referred to herein, thequantum efficiency of an LED is the ratio of the number of photonsgenerated by the LED to the number of electron-hole recombinations thatoccur in the LED. This can allow for an LED to have a relatively largecross-section (e.g., at least about one millimeter by at least about onemillimeter) while exhibiting good performance.

In some embodiments, the wall plug efficiency of an LED having thedesign of LED 100 is substantially independent of the length of the edgeof the LED. For example, the difference between the wall plug efficiencyof an LED having the design of LED 100 and one or more edges having alength of about 0.25 millimeter and the wall plug efficiency of LEDhaving the design of LED 100 and one or more edges having a length ofone millimeter can vary by less than about 10% (e.g., less than about8%, less than about 5% , less than about 3%). As referred to herein, thewall plug efficiency of an LED is the product of the injectionefficiency of the LED (the ratio of the numbers of carriers injectedinto the device to the number of carriers that recombine in thelight-generating region of the device), the radiative efficiency of theLED (the ratio of electron-hole recombinations that result in aradiative event to the total number of electron-hole recombinations),and the extraction efficiency of the LED (the ratio of photons that areextracted from the LED to the total number of photons created). This canallow for an LED to have a relatively large cross-section (e.g., atleast about one millimeter by at least about one millimeter) whileexhibiting good performance.

In some embodiments, it may be desirable to manipulate the angulardistribution of light that emerges from LED 100 via surface 110. Toincrease extraction efficiency into a given solid angle (e.g., into asolid angle around the direction normal to surface 110) we examine theFourier transform of the dielectric function that varies spatiallyaccording to pattern 150 (as described earlier). FIG. 12 shows theFourier transform construction for two ideal triangular lattices ofdifferent lattice constant. To increase the extraction efficiency, weseek to increase the number of G points within the encapsulant lightline and scattering strengths of G points (ε_(G)) within the materiallight line. This would imply increasing the. NND so as to achieve theeffect depicted in FIG. 5. However, here we are concerned withincreasing the extraction efficiency into a solid angle centered aroundthe normal direction. Therefore, we would also like to limit theintroduction of higher order G points by reducing the radius of theencapsulant light line, such that the magnitude of G>(ω(n_(e)))/c. Wecan see that by decreasing the index of refraction of the encapsulant(the bare minimum of which is removing the encapsulant all together) weallow larger NND and therefore increase the number of G points withinthe material light line that are available to contribute to extractionin the normal direction (F_(k=0)) while simultaneously avoidingdiffraction into higher order (oblique angles) in the encapsulant. Theabove described trends are depicted in FIG. 13 which shows extractionefficiency into a solid angle (given by the collection half-angle in thediagram). The data shown in FIG. 13 are calculated using the parametersgiven for the LED 100 shown in FIG. 1, except that the emitted light hasa peak wavelength of 530 nm and a bandwidth of 34 nm, the index ofrefraction of the encapsulant was 1.0, the thickness of the p-dopedlayer was 160 nm, the light generating layer was 30 nm thick, the NND(a) for the three curves is shown on FIG. 13, and the depth, holediameter, and n-doped layer thickness scaled with a, as 1.27 a, 0.72 a,and 1.27 a+40 nm, respectively. As the lattice constant is increased,the extraction efficiency at narrow angles increases as well as theoverall extraction efficiency into all angles. However, for even largerlattice constant, diffraction into higher order modes in the encapsulantlimits the extraction efficiency at narrow angles even though theoverall extraction efficiency increases into all angles. For a latticeconstant of 460 nm, we calculate greater than 25% extraction efficiencyinto a collection half-angle of 30°. That is, about half of theextracted light is collected within only about 13.4% of the upperhemisphere of solid angle demonstrating the collimation effect of thepattern. It is believed that any pattern that increases the number of Gpoints within the material light line while limiting the number of Gpoints within the encapsulant light line to only the G points at k=0 canimprove the extraction efficiency into a solid angle centered around thenormal direction.

The approach is especially applicable for reducing the source etenduewhich is believed to often be proportional to n², where n is the indexof refraction of the surrounding material (e.g., the encapsulant). It istherefore believed that reducing the index of refraction of theencapsulating layer for LED 100 can lead to more collimated emission, alower source etendue, and therefore to a higher surface brightness (heredefined as the total lumens extracted into the etendue of the source).In some embodiments then, using an encapsulant of air will reduce thesource etendue while increasing extraction efficiency into a givencollection angle centered around the normal direction.

In certain embodiments, when light generated by region 130 emerges fromLED 100 via surface 110, the distribution of light is more collimatedthan a lambertian distribution. For example, in some embodiments, whenlight generated by region 130 emerges from LED 100 via surface 110, atleast about 40% (e.g., at least about 50%, at least about 70%, at leastabout 90%) of the light emerging via the surface of the dielectric layeremerges within at most about 30° (e.g., at most about 25°, at most about20°, at most about 15°) of an angle normal to surface 110.

The ability to extract a relatively high percentage of light from adesired angle alone or coupled with a relatively high light extractioncan allow for a relatively high density of LEDs to be prepared on agiven wafer. For example, in some embodiments, a wafer has at leastabout five LEDs (e.g., at least about 25 LEDs, at least about 50 LEDs)per square centimeter.

In some embodiments, it may be desirable to modify the wavelength(s) oflight that emerge(s) from a packaged LED 100 relative to thewavelength(s) of light generated by light-generating region 130. Forexample, as shown in FIG. 14, an LED 300 having a layer containing aphosphor material 180 can be disposed on surface 110. The phosphormaterial can interact with light at the wavelength(s) generated byregion 130 to provide light at desired wavelength(s). In someembodiments, it may be desirable for the light that emerges frompackaged LED 100 to be substantially white light. In such embodiments,the phosphor material in layer 180 can be formed of, for example, a(Y,Gd)(Al,Ga)G:Ce³⁺ or “YAG” (yttrium, aluminum, garnet) phosphor. Whenpumped by blue light emitted from the light-generating region 130, thephosphor material in layer 180 can be activated and emit light (e.g.,isotropically) with a broad spectrum centered around yellow wavelengths.A viewer of the total light spectrum emerging from packaged LED 100 seesthe yellow phosphor broad emission spectrum and the blue InGaN narrowemission spectrum and typically mixes the two spectra to perceive white.

In certain embodiments, layer 180 can be substantially uniformlydisposed on surface 110. For example, the distance between the top 151of pattern 150 and the top 181 of layer 180 can vary by less than about20% (e.g., less than about 10%, less than about 5%, less than about 2%)across surface 110.

In general, the thickness of layer 180 is small compared to thecross-sectional dimensions of surface 130 of LED 100, which aretypically about one millimeter (mm) by one mm. Because layer 180 issubstantially uniformly deposited on surface 110, the phosphor materialin layer 180 can be substantially uniformly pumped by light emerging viasurface 110. The phosphor layer 180 is relatively thin compared to thedimensions of the surface 110 of the LED 100, such that light emitted bythe light-generating region 130 is converted into lower wavelength lightwithin the phosphor layer 180 approximately uniformly over the entiresurface 110 of LED 100. Thus, the relatively thin, uniform phosphorlayer 180 produces a uniform spectrum of white light emitted from theLED 100 as a function of position on surface 110.

In general, LED 100 can be fabricated as desired. Typically, fabricationof LED 100 involves various deposition, laser processing, lithography,and etching steps.

Referring to FIG. 15, a LED wafer 500 containing an LED layer stack ofmaterial deposited on a sapphire substrate is readily available and canbe purchased from a commercial vendor. On the sapphire substrate 502 aredisposed, consecutively, a buffer layer 504, an n-doped Si:GaN layer506, an AlGaN/GaN heterojunction or superlattice that provides a currentspreading layer 508, an InGaN/GaN multi-quantum well light-generatingregion 510, and a p-doped Mg:GaN layer 512. The commercially availableLED wafer is about 2-3 inches in diameter and multiple LED dice can becut from the wafer to form individual devices after the wafer has beenprocessed. Before dicing the wafer, a number of wafer scale processingsteps are used to position the p-doped layer 128 on the same side of thelight-generating region 130 as the mirror layer 126.

Referring to FIG. 16, a relatively thin nickel layer 520 is deposited(e.g., using electron-beam evaporation) on p-doped layer 512 to form ap-type ohmic contact to p-doped layer 512. A silver layer 522 isdeposited (e.g., using electron-beam evaporation) on nickel layer 520. Arelatively thick nickel layer 524 is deposited on silver layer 522(e.g., using electron-beam evaporation). Layer 524 can act as diffusionbarrier to reduce the diffusion of contaminants into silver layer 522. Agold layer 526 is deposited on nickel layer 524 (e.g., using resistanceevaporation). Wafer 500 is then annealed at a temperature between 400and 600 degrees Celsius for between 30 and 300 seconds in a nitrogen,oxygen, air, or forming gas to achieve an ohmic contact.

Referring to FIG. 17, a submount wafer 600 is prepared by depositing ona p-doped silicon wafer 602, consecutively (e.g., using electron-beamevaporation) an aluminum contact layer 604. A gold layer 608 isdeposited (e.g., using thermal evaporation) onto layer 604, and a AuSnbonding layer 610 is deposited (e.g., using thermal evaporation) ontolayer 608. Submount wafer 600 is annealed at a temperature between 350and 500 degrees Celsius for between 30 and 300 seconds in a nitrogen,oxygen, air, or forming gas to achieve an ohmic contact.

Wafer 500 and 600 are bonded together by bringing the layer 526 intocontact with layer 610 of the submount wafer 600 (e.g., using athermal-mechanical press) using pressures from 0 to 0.5 MPa andtemperatures ranging from 200-400 degrees Celsius. Layer 510 and layer610 form a eutectic bond. The combined wafer sandwich is cooled and thebonded sandwich is removed from the press.

After bonding, substrate 502 is removed from the combined structure by alaser liftoff process. Laser liftoff processes are disclosed, forexample, in U.S. Pat. Nos. 6,420,242 and 6,071,795, which are herebyincorporated by reference. In some embodiments, a 248 nm laser beam isshined through substrate 502 to locally heat n-doped Si:GaN layer 506near its interface with sapphire substrate 502, decomposing a sublayerof n-doped layer 506. The wafer sandwich is then heated to above themelting point of gallium, at which point sapphire substrate 502 isremoved from the sandwich by applying a lateral force to it (e.g., usinga cotton swab). The exposed GaN surface is then cleaned (e.g., using ahydrochloric acid bath) to remove liquid gallium from the surface.Often, when sapphire substrate 502 is removed from the GaN epitaxiallayer stack, strain that was present in the stack (e.g., due to thelattice mismatch between substrate 502 and the stack) is removed fromthe stack. This can allow the stack to relax from a warped or bowedshape it may have had when bonded to substrate 502, and to assume arelatively flat shape on the exposed surface of n-doped layer 506. Thecoefficient of thermal expansion is considered when choosing thesubmount to avoid cracking in the laser liftoff process. In addition,cracking can be reduced during laser-liftoff by substantiallyoverlapping fields in the step and repeat process.

Referring to FIG. 18, the exposed surface of n-doped Si:GaN layer 506 isetched back (e.g., using a reactive ion etching process) to achieve adesired thickness for the layer to be used in the final device (FIG.19). After etching, the surface of the etched GaN layer 506 has aroughened surface texture 700 due to the etching. Roughened surface 700can be planarized and thinned (e.g., using a chemical-mechanicalprocess) to achieve a final thickness for layer 506 and surfacesmoothness of less than about 5 nm root mean square (rms).Alternatively, roughened surface 700 can be maintained in order to aidin increasing the extraction efficiency of the device by introducing alocally non-planar interface to the device 100. The roughened surfaceincreases the probability, with respect to a microscopically smoothsurface, that a light ray that strikes surface 700 multiple times willeventually strike the surface at an angle that less than the criticalangle given by Snell's law and will be extracted through the surface700.

After etching, to prepare a dielectric function pattern in the n-dopedlayer 506, first a planarization layer 702 of a material (e.g., apolymer) is disposed (e.g., using spin-coating) onto n-doped GaN layer506 and a resist layer 704 is disposed (e.g., spin-coated) ontoplanarization layer 702. The pattern that forms the photonic lattice inthe LED is then created in n-doped layer 506 by a nanoimprintlithography and etching process. First, a mold that defines a portion ofthe desired pattern is pressed into the resist layer 704 and steppedacross the entire surface of the wafer in a portion-by-portion manner toprint the features of the pattern 150 and leaving regions for depositingn-contacts later on in the process flow. Preferably, the surface ofn-doped layer 506 is substantially flat during this portion of theprocess. X-ray lithography or deep ultraviolet lithography, for example,can also be used to create the pattern in resist layer 704. As analternative to depositing a resist on the wafer and creating a patternin the resist on the wafer, a predeposited etch mask can be laid down onthe surface of layer 506.

Patterned layer 704 is used as a mask to transfer the pattern into theplanarization layer 702 (e.g., using a reactive-ion etching process).Planarization layer is subsequently used as a mask to transfer thepattern into the n-doped layer 506. Following etching of GaN layer 506,the planarization layer is removed (e.g., using an oxygen-based reactiveion etch).

After the pattern has been transferred to n-doped layer 506, a layer ofphosphor material can optionally be disposed (e.g., spin-coated) ontothe patterned surface of n-doped layer 506. In some embodiments, thephosphor can conformally coat the patterned surface (coat withsubstantially no voids present along the bottoms and sidewalls of theopenings in the patterned surface). Alternatively, a layer ofencapsulant material can be disposed on the surface of patterned n-dopedlayer 506 (e.g. by CVD, sputtering, suspension by liquid binder that issubsequently evaporated). In some embodiments, the encapsulant cancontain one or more phosphor materials. In some embodiments, thephosphor can be compressed to achieve thickness uniformity less that20%, less than 15%, less than 10%, less than 5%, or less than 2% of theaverage thickness of the phosphor. In some embodiments, thephosphor-containing encapsulant can conformally coat the patternedsurface.

After the dielectric function pattern has been created in the n-dopedlayer 506, individual LED dice can be cut from the wafer. Once waferprocessing and wafer testing is complete, individual LED dice areseparated and prepared for packaging and testing. A sidewall passivationstep and/or a pre-separation deep mesa etching step may be used toreduce potential damage to the electrical and/or optical properties ofthe patterned LED incurred during wafer cutting. The individual LEDs canbe any size up to the size of the wafer itself, but individual LEDs aretypically square or rectangular, with sides having a length betweenabout 0.5 mm to 5 mm. To create the dice, standard photolithography isused to define the location of contact pads on the wafer for energizingthe device, and ohmic contacts are evaporated (e.g. using electron beamevaporation) onto the desired locations.

If an LED die is packaged, the package should generally be capable offacilitating light collection while also providing mechanical andenvironmental protection of the die. For example, a transparent covercan be packaged on the LED die to protect the patterned surface of the506 when an encapsulant is not used. The cover slip is attached tosupports 142 using a glassy frit that is melted in a furnace. Theopposite ends of the supports are connected using a cap weld or an epoxyfor example. Supports are typically Ni-plated to facilitate welding toan Au plated surface of the package. It believed that the absence of anencapsulant layer allows higher tolerable power loads per unit area inthe patterned surface LED 100. Degradation of the encapsulant can be acommon failure mechanism for standard LEDs and is avoided not using anencapsulant layer.

Because the LEDs are cut from a large area flat wafer, their lightoutput per area does not decrease with area. Also, because the crosssection of an individual LEDs cut from a wafer is only slightly largerthan the light-emitting surface area of the LED, many individual, andseparately addressable LEDs can be packed closely together in an array.If one LED does not function (e.g., due to a large defect), then it doesnot significant diminish the performance of the array because theindividual devices are closely packed.

While certain embodiments have been described, other embodiments arepossible.

As an example, while certain thickness for a light-emitting device andassociated layers are discussed above, other thicknesses are alsopossible. In general, the light-emitting device can have any desiredthickness, and the individual layers within the light-emitting devicecan have any desired thickness. Typically, the thicknesses of the layerswithin multi-layer stack 122 are chosen so as to increase the spatialoverlap of the optical modes with light-generating region 130, toincrease the output from light generated in region 130. Exemplarythicknesses for certain layers in a light-emitting device include thefollowing. In some embodiments, layer 134 can have a thickness of atleast about 100 nm (e.g., at least about 200 nm, at least about 300 nm,at least about 400 nm, at least about 500nm) and/or at most about 10microns (e.g., at most about five microns, at most about three microns,at most about one micron). In certain embodiments, layer 128 has athickness of at least about 10 nm (e.g., at least about 25 nm, at leastabout 40 nm) and/or at most about one micron (e.g., at most about 500nm, at most about 100 nm). In some embodiments, layer 126 has athickness of at least about 10 nm (e.g., at least about 50 nm, at leastabout 100 nm) and/or at most about one micron (e.g., at most about 500nm, at most about 250 nm). In certain embodiments, light-generatingregion 130 has a thickness of at least about 10 nm (e.g., at least about25 nm, at least about 50 nm, at least about 100 nm) and/or at most about500 nm (e.g., at most about 250 nm, at most about 150 nm).

As an example, while a light-emitting diode has been described, otherlight-emitting devices having the above-described features (e.g.,patterns, processes) can be used. Such light-emitting devices includelasers and optical amplifiers.

As another example, while current spreading layer 132 has been describedas a separate layer from n-doped layer 134, in some embodiments, acurrent spreading layer can be integral with (e.g., a portion of) layer134. In such embodiments, the current spreading layer can be arelatively highly n-doped portion of layer 134 or a heterojunctionbetween (e.g. AlGaN/GaN) to form a 2D electron gas.

As a further example, while certain semiconductor materials have beendescribed, other semiconductor materials can also be used. In general,any semiconductor materials (e.g., III-V semiconductor materials,organic semiconductor materials, silicon) can be used that can be usedin a light-emitting device. Examples of other light-generating materialsinclude InGaAsP, AlInGaN, AlGaAs, InGaAlP. Organic light-emittingmaterials include small molecules such as aluminumtris-8-hydroxyquinoline (Alq₃) and conjugated polymers such aspoly[2-methoxy-5-(2-ethylhexyloxy)-1,4-vinylenephenylene] or MEH-PPV.

As an additional example, while large area LEDs have been described, theLEDs can also be small area LEDs (e.g., LEDs smaller than the standardabout 300 microns on edge).

As another example, while a dielectric function that varies spatiallyaccording to a pattern has been described in which the pattern is formedof holes, the pattern can also be formed in other ways. For example, apattern can be formed continuous veins and/or discontinuous veins in theappropriate layer. Further, the pattern in varying dielectric functioncan be achieved without using holes or veins. For example, materialshaving different dielectric functions can be patterned in theappropriate layer. Combinations of such patterns can also be used.

As a further example, while layer 126 has been described as being formedof silver, other materials can also be used. In some embodiments, layer126 is formed of a material that can reflect at least about 50% of lightgenerated by the light-generating region that impinges on the layer ofreflective material, the layer of reflective material being between thesupport and the multi-layer stack of materials. Examples of suchmaterials include distributed Bragg reflector stacks and various metalsand alloys, such as aluminum and aluminum-containing alloys.

As another example, support 120 can be formed of a variety of materials.Examples of materials from which support 120 can be formed includecopper, copper-tungsten, aluminum nitride, silicon carbide,beryllium-oxide, diamonds, TEC and aluminum.

As an additional example, while layer 126 has been described as beingformed of a heat sink material, in some embodiments, a light-emittingdevice can include a separate layer (e.g., disposed between layer 126and submount 120) that serves as a heat sink. In such embodiments, layer126 may or may not be formed of a material that can serve as a heatsink.

As a further example, while the varying pattern in dielectric functionhas been described as extending into n-doped layer 134 only (which cansubstantially reduce the likelihood of surface recombination carrierlosses) in addition to making use of the entire light-generating region,in some embodiments, the varying pattern in dielectric function canextend beyond n-doped layer (e.g., into current spreading layer 132,light-generating region 130, and/or p-doped layer 128).

As another example, while embodiments have been described in which aircan be disposed between surface 110 can cover slip 140, in someembodiments materials other than, or in an addition to, air can bedisposed between surface 110 and cover slip 140. Generally, suchmaterials have an index of refraction of at least about one and lessthan about 1.5 (e.g., less than about 1.4, less than about 1.3, lessthan about 1.2, less than about 1.1). Examples of such materials includenitrogen, air, or some higher thermal conductivity gas. In suchembodiments, surface 110 may or may not be patterned. For example,surface 110 may be non-patterned but may be roughened (i.e., havingrandomly distributed features of various sizes and shapes less thanλ/5).

In some embodiments, a light-emitting device can include a layer of aphosphor material coated on surface 110, cover layer 140 and supports142.

In certain embodiments, a light-emitting device can include a coverlayer 140 that has a phosphor material disposed therein. In suchembodiments, surface 110 may or may not be patterned.

In an alternative implementation, the light emitted by thelight-generating region 130 is UV (or violet, or blue) and the phosphorlayer 180 includes a mixture of a red phosphor material (e.g.,L₂O₂S:Eu³⁺), a green phosphor material (e.g, ZnS:Cu,Al,Mn), and bluephosphor material (e.g, (Sr,Ca,Ba,Mg)₁₀(PO₄)₆Cl:Eu²⁺).

Other embodiments are in the claims.

1-36. (canceled)
 37. A method, comprising: bonding a first multi-layerstack with a second multi-layer stack, wherein: the first multi-layerstack comprises: a submount; and a bonding layer supported by thesubmount; and the second multi-layer stack comprises: a substrate; and aquantum-well containing region supported by the substrate.
 38. Themethod of claim 37, wherein the second multi-layer stack furthercomprises an n-doped layer between the substrate and the quantum-wellcontaining region.
 39. The method of claim 37, wherein the secondmulti-layer stack further comprises a p-doped layer supported by thequantum-well containing region.
 40. The method of claim 39, wherein thesecond multi-layer stack further comprises an ohmic contact layersupported by the p-doped layer.
 41. The method of claim 39, wherein thesecond multi-layer stack further comprises a reflective layer supportedby the p-doped layer.
 42. The method of claim 41, wherein the secondmulti-layer stack further comprises a diffusion barrier layer supportedby the reflective layer layer.
 43. The method of claim 41, wherein thesecond multi-layer stack further comprises a gold-containing layersupported by the diffusion barrier layer.
 44. The method of claim 40,wherein the second multi-layer stack further comprises a reflectivelayer supported by the ohmic contact layer.
 45. The method of claim 37,wherein the first multi-layer stack further comprises a contact layerbetween the submount and the bonding layer.
 46. The method of claim 37,wherein the first multi-layer stack further comprises a gold-containinglayer between the submount and the bonding layer.
 47. The method ofclaim 37, further comprising annealing the first multi-layer stack priorto bonding the first multi-layer stack to the second multi-layer stack.48. The method of claim 47, wherein annealing the first multi-layerstack comprises annealing the first multi-layer stack at a temperaturefrom about 300 degrees Celsius to about 600 degrees Celsius.
 49. Themethod of claim 47, wherein annealing the first multi-layer stackcomprises annealing the first multi-layer stack for about 30 seconds toabout 300 seconds.
 50. The method of claim 37, further comprisingannealing the second multi-layer stack prior to bonding the firstmulti-layer stack with the second multi-layer stack.
 51. The method ofclaim 50, wherein annealing the second multi-layer stack comprisesannealing the second multi-layer stack at a temperature from about 350degrees Celsius to about 500 degrees Celsius.
 52. The method of claim50, wherein annealing the second multi-layer stack comprises annealingthe second multi-layer stack for about 30 seconds to about 300 seconds.53. The method of claim 37, wherein the bonding layer comprises tin. 54.The method of claim 37, wherein the bonding layer comprises a gold/tinalloy.
 55. The method of claim 43, wherein the bonding layer comprisesgold.
 56. The method of claim 43, wherein bonding the first multi-layerstack with the second multi-layer stack comprises bonding the bondinglayer with the gold containing layer.
 57. The method of claim 37,further comprising processing the bonded first and second multilayerstacks to form a light emitting device.